ADT7462
Read Operations
The ADT7462 uses the following SMBus read protocols.
Receive Byte
The receive byte is useful when repeatedly reading a
single register. The register address must be set up
previously. In this operation, the master device receives a
single byte from a slave device as follows:
1. The master device asserts a start condition on SDA.
2. The master sends the 7-bit slave address followed
by the read bit (high).
12. The master asserts an ACK on SDA after each
data byte.
13. The ADT7462 issues a PEC byte to the master.
The master should check the PEC byte and issue
another block read if the PEC byte is incorrect.
14. A NO ACK is generated after the PEC byte to
signal the end of the read.
15. The master asserts a stop condition on SDA to end
the transaction.
1 2 3 4 5 6 7
3. The addressed slave device asserts an ACK on SDA.
4. The master receives a data byte.
S
SLAVE
ADDRESS
COMMAND
W A 0xA1 BLOCK A
READ
S
SLAVE
ADDRESS
R
5. The master asserts a NO ACK on SDA.
6. The master asserts a stop condition on SDA to end
8
9
10
11
12
13
14 15
the transaction.
A
BYTE
COUNT
A DATA 1
A
DATA
32
A
PEC A
P
For the ADT7462, the receive byte protocol is used to read
S ADDRESS R A
DATA
A P
a single byte of data from a register whose address has
previously been set by a send byte or write a byte operation.
1 2 3 4 5 6
SLAVE
Figure 30. Single-byte Read from a Register
Block Read
In this operation, the master device reads a block of data
from a slave device. The start address for a block read must
be set previously, as well as the number of bytes to be read
(maximum = 32). In the case of the ADT7462, the start
address is activated by a send byte operation to set a RAM
address. The number of bytes to be read should be written to
the #Bytes bits in the Configuration 0 register. The block
read operation consists of a send byte operation that sends
a block read command to the slave, immediately followed by
a repeated start and a read operation that reads out multiple
data bytes, as follows:
1. The master device asserts a start condition on SDA.
2. The master sends the 7-bit slave address followed
by the write bit (low).
3. The addressed slave device asserts an ACK on SDA.
4. The master sends a command code that tells the slave
device to expect a block read. The ADT7462
command code for a block read is 0xA1 (1010 0001).
5. The slave asserts an ACK on SDA.
6. The master asserts a repeat start condition on SDA.
7. The master sends the 7-bit slave address followed
by the read bit (high).
8. The slave asserts an ACK on SDA.
9. The ADT7462 sends a byte count telling the
master how many data bytes to expect. The
maximum number of bytes is 32.
10. The master asserts an ACK on SDA.
Figure 31. Block Read from RAM
Note that although the ADT7462 supports packet error
checking (PEC), its use is optional. The PEC byte is
calculated using CRC ? 8. The frame check sequence (FCS)
conforms to CRC ? 8 by the polynomial.
C(x) + x 8 ) x 2 ) x ) 1
Consult the SMBus 1.1 specifications for more information.
Alert Response Address
Alert Response Address (ARA) is a feature of SMBus
devices that allows an interrupting device to identify itself
to the host when multiple devices exist on the same bus.
The SMBALERT output can be used as either an interrupt
output or an SMBALERT. One or more outputs can be
connected to a common SMBALERT line connected to the
master. If a device’s SMBALERT line goes low, the
following procedure occurs:
1. SMBALERT is pulled low.
2. The master initiates a read operation and sends the
alert response address (ARA = 0001 100). This is
a general call address that must not be used as a
specific device address.
3. The device whose SMBALERT output is low
responds to the ARA, and the master reads its
device address. The address of the device is now
known and can be interrogated in the usual way.
4. If more than one device’s SMBALERT output is
low, the one with the lowest device address has
priority in accordance with normal SMBus
arbitration.
5. Once the ADT7462 has responded to the ARA, the
master must read the status registers, and the
SMBALERT is cleared only if the error condition
has gone away.
11. The master receives the expected number of data
bytes.
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